Open Source Summit Europe 2024

RISC-V, an open-standards Instruction Set Architecture (ISA), provides the freedom to add instructions for domain-specific acceleration. This session highlights the significance of ongoing standardization efforts at RISC-V aimed at enhancing AI/ML capabilities through specific architectural enhancements: optimized instructions for matrix operations, efforts to merge GPGPU-style processing into a coherent, multi-paradigm compute resource, and support for emerging paradigms like spiking neural networks. This positions RISC-V to become a "lingua franca" for portable AI/ML libraries and kernels that can transparently be moved between compatible hardware from multiple vendors.