Open Source Summit Europe 2024

Semiconductor industry has entered a new era of chip design, moving from monolithic SOCs to multi-chiplet design. The new generation devices demands for more functionality, higher bandwidth and lower power often within smaller footprints. Multi-chiplet packages provide improved performance, cost savings and design flexibility.
Systems that comprises more than one chip can have several SOCs that are connected externally or a SOC package comprising several SOCs connected inside a single physical package.Each SOC is integrated with an interrupt controller. In a complex SOC design where wide range of peripherals are integrated, reducing interrupt latency and complexity of handling interrupts play a major role.

This talk will cover why we need multiple interrupt controllers in a multi-chiplet design. And how to implement the interrupt routing to CPUs across different chips. Also will see how to achieve consistency between interrupt controllers in multi-chiplet system. At the end will have a look on software implementation of multichip interrupt handling refering to ARM trusted firmware by taking an example of ARM’s Generic Interrupt Controller which support multiple GIC configuration